LICENSE DAEMON MODELSIM ALTERA CODE
LICENSE DAEMON MODELSIM ALTERA LICENSE

Nios2-elf-g++ -T'./simple_socket_server_tse_1_bsp//linker.x' -msys-crt0='./simple_socket_server_tse_1_bsp//obj/HAL/src/crt0.o' -msys-lib=ucosii_bsp -L./simple_socket_server_tse_1_bsp/ -Wl,-Map=simple_socket_server_tse_1.map -O0 -g -Wall -mno-hw-div -mhw-mul -mhw-mulx -o simple_socket_server_tse_1.elf obj/default/alt_error_handler.o obj/default/iniche_init.o obj/default/led.o obj/default/network_utilities.o obj/default/simple_socket_server.o obj/default/tse_my_system.o -lm -msys-lib=m Info: Linking simple_socket_server_tse_1.elf Everything seems to be fine until I get the following errors while building and compiling the simple socket server example in Nios 2 SBT: I would like to run simple socket server example on the design that I created (which is a tweaked version of ethernet standard design example available on altera website).

I am using Stratix IV GX dev kit with Quartus v15.0. so my question is: is there a 'legal' way to do this?

LICENSE DAEMON MODELSIM ALTERA LICENSE

I cannot force the whole company to use an old license (having puchased a new one) file only because I need it.

I can understand why: if this would be possible, I could easily multiply my licenses, and this is not allowed. It works, but after some time, the altera license daemon stops with an error, because it detects another daemon running. In this way I could connect to an alternate server port only when I am working on this old project. I tried to run multiple services from the flexlm tool, connected to different IP ports. I configured the license server with the old (expired) license file, and it was possible to compile and generate the programming file, but this cannot be a solution because we have floating licenses running on a server, that is used by many designers. So I have the right software, I have a working license, but I cannot use an IP whose license was previously included into the base software. Only a time-limited programming file is generated. Unfortunately it is not more possible to generate a working programming file, because with the current Quartus II license file (dated august 2015), the license to compile this IP is not more present. So I installed the software, made the modifications and recomplied it. I need to modify an old project, developed with Quartus II 9.0 on a Stratix III, that contains a DDR2 controlled made using an altmemphy IP. sipo1_run_msim_rtl_vhdl.do PAUSED at line 12 # Fatal error in file C:/Users/SAULO/Downloads/PROYECTOS FPGA/Tarea/sipo1/simulation/modelsim/sipo1_tb.vhd # while elaborating region: /sipo1_tb/uut # Fatal error in file C:/Users/SAULO/Downloads/PROYECTOS FPGA/Tarea/sipo1/sipo1.vhd # Time: 0 ps Iteration: 0 Instance: /sipo1_tb/uut File: C:/Users/SAULO/Downloads/PROYECTOS FPGA/Tarea/sipo1/sipo1.vhd Line: 9 # ** Failure: (vsim-3807) Types do not match between component and entity for port 'D'. # vsim -gui '+altera' -l msim_transcript -do 'sipo1_run_msim_rtl_vhdl.do' # vsim -t 1ps -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L cycloneive -L rtl_work -L work -voptargs='+acc' sipo1_tb # - Compiling architecture behavioral of sipo1_tb # vcom -reportprogress 300 -93 -work work C:/Users/SAULO/Downloads/PROYECTOS FPGA/Tarea/sipo1/simulation/modelsim/sipo1_tb.vhd # Model Technology ModelSim ALTERA vcom 10.3d Compiler 2014.10 Oct 7 2014 # ** Warning: Copied C:/altera/15.0/modelsim_ase/win32aloem/./modelsim.ini to modelsim.ini. # Copying C:/altera/15.0/modelsim_ase/win32aloem/./modelsim.ini to modelsim.ini

# Model Technology ModelSim PE vmap 10.3d Lib Mapping Utility 2014.10 Oct 7 2014 # Reading C:/altera/15.0/modelsim_ase/tcl/vsim/pref.tcl The error is 'PAUSED AT LINE 12', in the next script, I show more detailed error

LICENSE DAEMON MODELSIM ALTERA CODE

code executes for every event on sensitivity list list connections between master ports and signals

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